Control of Spin Qubits at Near Absolute Zero Could Enable Million Qubit Quantum Computers

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David Reilly and his University of Sidney team developed a silicon chip that can control spin qubits at milli-kelvin temperatures. That’s just slightly above absolute zero (-273.15 degrees Celsius), the temperature at which – theoretically – matter ceases moving.

Experts think that spin qubits (where information is encoded onto the magnetic direction of single electrons) could more easily scale up as they are based on common CMOS (complementary metal-oxide-semiconductor) technology that underpins modern conventional computing and is already used to print billions of transistors.

Spin qubits must be kept at temperatures below 1 kelvin to preserve their information. To scale-up they also need to be controlled and measured using complex, integrated electronics. This created a real concern that even if you could get the control system to work at that temperature, the heat and electrical interference generated by placing the control so close to the qubits would degrade their performance.

Professor Reilly’s team has, for the first time, shown that with careful design this need not be the case – a vital proof-of-principle demonstration that spin qubits in CMOS could be scaled up to the millions of qubits to make a useful machine.

Professor Reilly said: “This result has been more than a decade in the making, building-up the know-how to be able to design electronic systems that dissipate tiny amounts of power and operate near absolute zero. We have now demonstrated a scalable control platform that can be integrated with qubits without destroying the fragile quantum states.

“This validates the hope that indeed qubits can be controlled at scale by integrating complex electronics at cryogenic temperatures. Our paper shows that with careful design of the control system, fragile qubits hardly notice the switching of transistors in a chip less than a millimetre away.”

The qubits were supplied by Diraq, a UNSW spin-out established by Professor Andrew Dzurak, and the know-how that enabled the University of Sydney-designed control chip will now carry over to underpin much of the work of the new company, Emergence Quantum, co-founded by Professor Reilly and Dr Thomas Ohki.

Nature – Spin-qubit control with a milli-kelvin CMOS chip

Abstract

A key virtue of spin qubits is their sub-micron footprint, enabling a single silicon chip to host the millions of qubits required to execute useful quantum algorithms with error correction. However, with each physical qubit needing multiple control lines, a fundamental barrier to scale is the extreme density of connections that bridge quantum devices to their external control and readout hardware. A promising solution is to co-locate the control system proximal to the qubit platform at milli-kelvin temperatures, wired up by miniaturized interconnects. Even so, heat and crosstalk from closely integrated control have the potential to degrade qubit performance, particularly for two-qubit entangling gates based on exchange coupling that are sensitive to electrical noise. Here we benchmark silicon metal-oxide-semiconductor (MOS)-style electron spin qubits controlled by heterogeneously integrated cryo-complementary metal-oxide-semiconductor (cryo-CMOS) circuits with a power density sufficiently low to enable scale-up. Demonstrating that cryo-CMOS can efficiently perform universal logic operations for spin qubits, we go on to show that milli-kelvin control has little impact on the performance of single- and two-qubit gates. Given the complexity of our sub-kelvin CMOS platform, with about 100,000 transistors, these results open the prospect of scalable control based on the tight packaging of spin qubits with a ‘chiplet-style’ control architecture.

The cryo-CMOS control chip consists of complex mixed-signal circuits realized using more than 100,000 transistors. Most of these transistors are used in the digital sub-systems and related circuit blocks, accounting for a fixed overhead power of tens of microwatts. On top of this constant offset power from the digital blocks, the CLFG analogue cells each contribute approximately 20 nW MHz−1 when generating 100 mV amplitude pulses, enabling many thousands of cells (and thus gate pulses) to fit within the cooling budget of a commercial dilution refrigerator (around 1 mW at 100 mK). Apart from the cooling limits of the refrigerator, however, a challenge arises in the thermal management of hot control systems to ensure the routing of heat bypasses proximal, cold quantum devices. Here, we have made no attempt to mitigate this parasitic heating, simply wire-bonding the chips together in a standard package. This arrangement can lead to elevated electron temperatures in the quantum device even when the refrigerator remains cold and is the likely explanation for the small impact we observe in qubit fidelity when the largest CMOS circuits are powered up at the highest clock rates. As such, we emphasize that there is a notable opportunity to suppress parasitic heating by using separate parallel cooling pathways for the CMOS chip and quantum plane7. The use of heterogeneous, rather than monolithic, integration opens new thermal configuration options in this regard.

Beyond direct heating, the close presence of 100,000 transistors, with volt-scale biasing and sub-nanosecond rise and fall times, can create an exceedingly noisy environment in which to operate electrically sensitive qubits. It is surprising that the CMOS chip has only a small impact on qubit performance relative to previous experiments with room-temperature control. Furthermore, the small degradation in fidelity is probably explained entirely from parasitic heating, rather than from electrical noise. Certainly, our use of CMOS design rules that minimize external crosstalk are important; however, beyond these, we suggest three additional aspects that probably reduce electrical noise. First, as the physical temperature of the CMOS die is a few hundred milli-kelvin, thermal noise contributions are substantially suppressed. Second, the chip-to-chip interconnect probably has a relatively low bandwidth, filtering noise above a few gigahertz. Last, we note that the action of the CLFG circuits effectively decouples the CMOS from the quantum device when in charge-lock mode, except for a very small coupling capacitor. Taken collectively, these aspects further underscore the utility of heterogeneous over monolithic integration for mitigating crosstalk and heating. Apart from addressing the challenges posed by scaling up qubits, cryo-CMOS using a chiplet architecture may also prove useful in generating ultrafast, low thermal noise control pulses that probe fundamental physics in mesoscale quantum devices36.

In conclusion, the results presented here demonstrate the viability of heterogeneous, milli-kelvin CMOS for generating the volt-scale biases and milli-volt pulses needed to control spin qubits at scale. Beyond addressing the interconnect bottleneck posed by cryogenic qubit platforms, these results show that degradation in qubit performance from milli-kelvin CMOS is very limited. Although our focus here has been controlling spin qubits based on single electrons, we draw attention to the inherent compatibility of our control architecture with other flavors of spin qubits, for instance, exchange-only qubits that leverage square voltage pulses exclusively. Pairing cryo-CMOS-based control with highly compatible radiofrequency readout approaches that exploit dense frequency multiplexing enables a highly integrated and scalable spin qubit platform.

Technical details

Dr Bartee and his co-authors measured the performance characteristics of one- and two-qubit operations controlled by the cryo-CMOS chiplet. They compared its performance against that of a standard cable-connected room-temperature control system

Their findings include:

Negligible fidelity loss for single-qubit operations;
No measurable reduction of the coherence time for one- and two-qubit operations;
Comparable behaviour of qubit interactions, indicating negligible interference from electrical noise.

Remarkably, these feats were achieved within a power envelope of just 10 microwatts, the vast majority of which was expended on the digital systems. The analogue components dissipate only around 20 nanowatts per megahertz, which means that the system can be scaled up to millions of qubits without a significant increase in power usage.
Research

Bartee, S. et al ‘Spin-qubit control with a milli-kelvin CMOS chip’ (Nature 2025)
DOI: 10.1038/s41586-025-09157-x

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